TECHNOLOGIES
▪ Si-Ge Platform
Star Photonics® introduces its new Si-Ge platform ("LASIG") which comprises several components that integrate Germanium (Ge) into Silicon (Si) for Silicon Photonics platform.
The major components are in-chip Laser, LED, Optical Amplifier (SOA) and Photodetector (PD).
We also introduce "LASIG+" version which offers tunable Laser/LED/SOA/PD, tunable optical bands and embedded platform for TEC.
Other typical passive and active components, e.g. waveguides, splitters, EO/TO modulators, etc., exist as well in the version of Si-Ge.
The components are monolithically integrated in the SOI wafer, or silicon layer, and planarly integrate with the other common components that comprises the photonic circuit. The entire technology is CMOS compatible.
The technology is patented (WO/2026/115541 "ELECTRONIC DEVICE USING Sl-GE HETEROSTRUCTURE") and can be licensed or procured.
Since it is CMOS compatible, every commercial fabrication facility that manufactures photonics could fabricate the technology without the need for new machines or complicated integration. Thus, the components can be also added to their PDK for their own clients.
Clients can experiment the technology by fabricating their typical Silicon Photonics circuits chips via Star Photonics (through our Fabrication Services for prototypes) and receive chips that have both IO to external fibers and built-in on-chip light sources/detectors via our Si-Ge components (prototype). It is possible to place as many light sources, optical amplifiers and detectors, in a chip being limited only by the size and available space on the chip.
Adding and fabricating our Si-Ge components into the same chips is provided free for the next few months.
The components, Laser/LED/SOA/PD, can be designed by the clients themselves to match their own specifications with accordance to the structure and technology aspects, or we can design it for them. To create circuits layout that comprises several common components, e.g. lasers, filters, splitters, etc., the Star Photonics software suite, and in particular Circuits King™ module, can be used for the designs and simulations. However, any other software may be used instead (mainly, sizes and locations of components are needed for fabrication).
▪ Fabrication In Silicon Photonics
Since Germanium is found in most fabrication facilities, commercial or academic, that support Silicon platform, the process required for our Si-Ge platform integrate naturally in terms of the fabrication cycle and thermal budget. The fabrication is exactly the same as performed for the standard photonic circuits in Silicon Photonics:
Starting with a standard SOI for Silicon Photonics circuits. Si device layer thickness is typically 220 nm and SiO2 is 2 µm.
Focusing on the circuits area within the chip. Typical components of Si, and our Si-Ge components, will be fabricated.
1. Doping the chip with N+ (e.g. Phosphorus) regions under typically 1,000°C. Required for Si EO Modulators anyway.
2. Doping the chip with P+ (e.g. Boron) regions under typically 900°C. Required for Si EO Modulators anyway.
3. Etching trenches in the Silicon to form the RIB waveguide for the passive devices (e.g. optical bus, filters, splitters, etc.) and for the active devices (e.g. EO modulators, tunable circuits, switches, etc.). Typically, leaving 40-80 nm of Si slab.
Also, etching trenches, i.e. cavities, of the same height for the Ge deposition to form the Si-Ge components.
4. Deposition of Ge in cavities (e.g. CVD, PVD, MBE) at a thickness of about 140 to 180 nm under typically 600°C.
For emission (i.e. Laser/LED/SOA), the Ge is doped with N+ (e.g. Phosphorus > 1e19cm¯³) at typically 700°C.
Notes: Ge is deposited nowadays for Si-Ge Photodetectors anyway. Doping of the Ge may be done in-situ via CVD/MBE.
5. Deposition of a clad layer (e.g. PECVD, PVD), typically with SiO2 or Si3N4, at regular thicknesses of 0.3 to 1.0 µm.
6. Forming the vias/plugs and metal contacts (e.g. Al, Au, etc.) for applied voltage. Required for Si EO Modulators anyway.
For the Si-Ge emitters, e.g. Laser/LED/SOA, Positive voltage is applied. For the Si-Ge PDs, negative voltage is applied.
▪ "LASIG+": 2nd Electrode
Since the Si-Ge components are lateral, and the Ge waveguide is in the same plain of the Si rib waveguide, Star Photonics offers an enhanced version of the device and technology ("LASIG+") which includes a 2nd electrode that can provide a variety of features:
-
Tunable Laser, LED, SOA and PD.
-
Embedded architecture for temperature regulation (TEC).
-
Tunable optical band for Laser, LED, SOA and PD.
1. Tunable (°C | λ | P) Optical Source
Thermo-Optical Electrode:
TEC: Can be used to regulate the heat and temperature of the device.
λ,ν,ω: Can tune the emitted/detected optical wavelength.
P: Can tune the emitted/detected optical power.
3. Modulating (P) Optical Source
Electro-Optical Electrode - MOS Capacitor:
P: Can modulate the emitted/detected optical power
providing high-speed direct modulation/switch.
MOS Capacitor → Electric Field →
Si-Ge Photonic Field-Effect Transistor (P-FET)
2. TEC (°C) Optical Source
TEC System & Electrode:
TEC: Can be used to regulate the heat and temperature of the device via direct contact to the Ge waveguide.
Instead of cooling medium, a MEMS fan can be used.
→ Embedded Architecture for temperature control.
4. Tunable (λ) Optical Band Source
Stress-Induced Electrode:
λ,ν,ω: Can tune the emitted/detected optical band wavelength, e.g. O-Band to L-Band and to MWIR, by shifting the band-gap via induced stress.
5. Enhancing (P) Optical Source
Electro-Optical Electrode:
P: Can enhance (under DC) or modulate (under RF) the
emitted/detected optical power.
Diode (PN or NN)Poly/Si-Ge → Junction →
Si-Ge Photonic Junc. Field-Effect Transistor (P-JFET)
6. High Power (P) Optical Source
Electro-Optical Electrode – Double Injection:
P: Can increase (under DC) or modulate (under RF) the
emitted optical power by providing an additional holes
current to the one produced by the lateral diode.
▪ Basic Operation
The generation of photons from the Ge waveguide occurs from two known effects of stress and doping. When the Ge is deposited in the Si cavity (e.g. 2-steps process in CVD, etc.) due to the lattice mismatch between Si and Ge, the Ge layer is tensile stressed (~0.25%) which reduces the energy gap between its indirect and direct energy bands.
Doping the Ge with electrons (N+), fills the energy levels in the indirect band, allowing flowing electrons under applied voltage to easily spill to the direct band, consequently, recombining with holes and generating photons.
The Si-Ge structure forms a unique electronic configuration of P-I-N-I-P. The operation under applied voltage is illustrated below
At the interface of the Si and Ge, a Si-Ge alloy is formed which due to differences in stress, doping concentration and refractive index, the optical mode supported by the waveguide may concentrate more at the interface region rather than at the center of the Ge waveguide. Our structure can take this into account and distance the generated light farther from the Si doping regions.
▪ Advantages & Comparisons
The advantages of the our Si-Ge structure and platform are highly significant. The technology provides the solution for an in-chip, CMOS compatible, planar light sources that can propagate the light to the standard Si waveguide without alignment and vertical coupling challenges and losses.
Below are the major advantages between the nowadays hybrid solutions (e.g. InP on Silicon, vertical lasers) and our Si-Ge solution:
▪ Integration (Coupling / Alignment Losses):
Ours: Located in the same plain as the Si rib waveguide and have the same height. Light transfer to, and from, the Si bus by
directional coupler, or other standard planar couplers, can be done without losses. There are no alignment losses.
Others: Located above the plain of the Si rib waveguide and thus requires lossy vertical couplers to transfer the light to the Si bus.
These couplers require additional fabrication steps and alignment to the Si bus which result with additional losses.
▪ Fabrication:
Ours: Fabricated in the same process and cycle of standard Silicon Photonics circuits. The fabrication is CMOS compatible.
Others: Fabricated externally and separately from the the standard Silicon Photonics circuits process and therefore requires
techniques, e.g. bonding, to attach and align the components to the SOI chip. SOA has not been commercially reported.
▪ Losses:
Ours: Generated photons that excite the propagating single mode are distanced from the highly doped Si regions (P+, N+) and
from the metals. The only losses it suffers are that of Ge doping (with N+) and the flowing current under applied voltage.
Sidewalls Surface roughness losses are much smaller as the high refractive index Si surrounds the Ge waveguide.
Others: In all solutions, the losses due to cavity doping and current flowing exist.
In some solutions, the generated photons interact with the highly doped regions resulting in significant optical losses.
Sidewall roughness losses are higher when the gain medium waveguide is surrounded by a typical clad material (e.g. SiO2).
▪ Heat & Dissipation:
Ours: The Si-Ge components enjoy an embedded architecture for temperature regulation and cooling by having a direct access to
the Ge waveguide (LASIG+ → 2nd electrode). A Peltier may not be required for the operation of the components.
Heat dissipation and eviction is the highest possible.
Others: Requires internal or dedicated temperature control unit for steady operation.
In most devices, heat is usually trapped in the structure as the gain waveguide cannot be approached directly.
▪ Dimension & Space:
Ours: The Si-Ge components have the smallest size needed for such components and can be densely packed in the chip's space.
Others: Hybrid solutions typically requires ~1×1 mm² per component. Not suitable for densely packed applications.
▪ Costs:
Ours: The costs for our Si-Ge components is 0 $.
No separate or external fabrication is needed, no bonding or dedicated cooling is required. Ge is CMOS compatible.
Others: Expensive per unit. Requires: separate fabrication, bonding, coupling, alignment, cooling and larger chip's space.
▪ Applications Example
Our Si-Ge components can found a variety of applications. The ability to densely packed light sources/detectors monolithically on chip and allowing full control on the structure properties, such as optical modes, couplers, cavity and gain, provide theses components the ability to drive 1D and 2D arrays of photonic circuits on chip.
A version of the components for Quantum applications, i.e. Single-Photon emitter/detector, can be supported as well.
Potential applications: Telecom, Datacom, Optical Interconnect, Sensing, Spectrometry, Optical Computing, Quantum Computing,
Programmable Photonics, Neural Networks, AI, Radars, Lidars, Tomography.
Here we provide two basic examples of applications that are suitable for our Si-Ge solution and much less suable for other solutions:
● Wavelength Division Multiplexing (WDM): Array of on-chip lasers for telecommunication and data-centers.
In this application, Si-Ge Lasers (or LEDs) with a 2nd electrode of heater metal, are employed for generating optical power and are temperature regulated by an on-chip digital TEC. The circuit of each laser comprises also two p-n diodes for temperature sensing and our Si-Ge photodetector (PD) that convert a small part of the laser emission to electrical current for the TEC operation.
Each laser also serves as a direct modulator of telecom data at a different wavelength as part of a WDM network.
● AI & Optical Computing: Array of lasers, SOAs and PDs for Neural Networks or Programmable Photonics.
In this application, Si-Ge Lasers, Si-Ge SOAs and Si-Ge PDs are densely integrated in SOI chip to form a neural network for AI and Optical Computing. In this array, active modulators and passive waveguides and splitters are employed in the processing chain of the network circuit.
Our Si-Ge SOA components are used as non-linear components which are required in neural networks.
Both passive and active components (e.g. Si modulators, Si splitters, etc.) can be replaced by the same components (Si-Ge phase/absorption modulator, splitters, etc.) from the Si-Ge platform.
▪ Platform Specifications
The specifications, and expected key parameters, of our Si-Ge components under the current experimental stage are detailed below:
Si-Ge Laser Key Parameters:
● Optical wavelength range: 1,400 - 1,800 nm (under typical stress)
● Optical CW power: > 20 mW
● Electrical voltage: 1.5 V
● Electrical current: 10 - 150 mA
Si-Ge Optical Amplifier (SOA) Key Parameters:
● Optical wavelength range: 1,400 - 1,800 nm
● Optical gain: > 15 dB
● Electrical voltage: 1.5 V
● Electrical current: 10 - 200 mA
Si-Ge LED Key Parameters:
● Optical wavelength range: 1,400 - 2,000 nm (under typical stress)
● Optical power (whole bandwidth): > 10 mW
● 3dB Bandwidth: 200 nm (λc ± 100 nm)
● Electrical voltage: 1.5 V
● Electrical current: 10 - 200 mA
Si-Ge Photodetector (PD) Key Parameters:
● Optical wavelength range: 600 - 1,800 nm
● Responsivity: > 0.9 A/W (at λ=1,310 nm and λ=1,550 nm)
● Dark Current: ~1 nA
● Electrical voltage: -1 V
Si-Ge Platform Key Parameters:
● Substrates: Standard Silicon-On-Insulator (SOI) and Si (optical grade)
● Gain medium: Germanium (Ge)
● Fabrication Process: CMOS compatible w. standard fabrication facilities (Academic, Commercial, VLSI)
● Optical wavelength range: 1,064 - 1,400 nm (Ge → compress stress)
1,400 - 6,000 nm (Ge → tensile stress)
● Net optical gain (g): 50 - 150 1/cm under injections of ~4e18cm¯³
▪ High-Power: > 500 1/cm under injections of ~1e19cm¯³ and larger Ge doping ~7e19cm¯³